Semiconductor devices such as field effect transistors (FETs) have a source region, and a drain region formed in a semiconductor substrate and a gate formed over the channel region. The source and drain are formed in a semiconductor substrate by introducing impurities (dopants) into the substrate. The semiconductor body separates the source region and the drain region. The dopants used to form the source and drain regions are of a different polarity (n-type or p-type) than the semiconductor substrate body surrounding the source and drain regions. Consequently, substantially no current will pass from the source to the semiconductor body or from the drain to the semiconductor body.
There is a space-charge layer which separates both the source region from the semiconductor body and the drain region from the semiconductor body. Current flows from source to drain across the body (through a region of the body referred to as the channel) under the influence of the gate. When the gate is below a certain voltage, called the threshold voltage, very little current flows from the source to the drain and the device is off. When the gate voltage is above the threshold voltage, a greater amount of current flows from the source to the drain and the device is on.
It is advantageous if individual FETs have the same threshold voltage as other FETs, irrespective of the length of a gate in a particular device. However, the threshold voltage of the device is determined by the doping profile in the body, the doping of the gate, as well as the thickness of the gate insulator (i.e. the thickness of the layer of insulating material on which the gate is formed). Of these factors, only the doping profile is affected by the gate length. This is due to the fact that doping the source and the drain has an effect on the region of the body adjacent the source and the drain (the channel region of the device).
The usual method of introducing dopant atoms which is controllable, reproducible and free from most undesirable side effects is ion implantation. During ion implantation, dopant atoms are ionized, accelerated and directed at a silicon substrate. They enter the crystal lattice of the silicon substrate, collide with silicon atoms and gradually lose energy, finally coming to rest at some depth within the lattice. The average depth can be controlled by adjusting the acceleration energy. The dopant dose can be controlled by monitoring the ion current during implantation. The principal side effect--disruption of the silicon lattice caused by ion collisions--is removed by subsequent heat treatment, i.e., annealing. Annealing is required to repair lattice damage and place dopant atoms on substitutional sites within the silicon substrate where they will be electrically active. Rapid thermal annealing is a term that covers various methods of heating wafers for short periods of time, e.g., 100 seconds, which enable almost complete electrical activation with diffusion of dopant atoms occurring within what had been previously regarded as tolerable limits.
However, during the anneal, damage from the ion implantation process, in the form of point defects, migrates laterally from the source and/or drain and into the semiconductor body and enhances dopant diffusion. This enhanced diffusion, known as transient enhanced diffusion (TED) changes the carefully tailored profile in the body of the device.
Transient enhanced diffusion occurs during post-implant annealing and arises from the fact that the diffusion of dopant atoms, particularly boron (B) and phosphorus (P), is undesirably enhanced by excess silicon (Si) self-interstitials generated by the implant. The generation of excess Si self-interstitials by the implant also leads to a phenomenon herein referred to as dynamic clustering whereby implanted dopant atoms form clusters or agglomerates in a semiconductor layer. These clusters or agglomerates are immobile and electrically inactive. Whereas in the past TED and dynamic clustering were not issues which overly concerned device manufacturers, TED and dynamic clustering now threaten to impose severe limitations on the minimum device dimensions attainable in future silicon device technologies.
The effect that TED will have on the threshold voltage of the device is related to the gate length. Specifically, the longer the gate length, the less the effect of TED on the threshold voltage of the device. This is because the effects of TED are within a certain distance of the source and drain. When the gate length is long, the effect of TED is not a function of gate length, and minor differences in gate length do not cause corresponding variations in the threshold voltage of the devices. When the gate length is shorter, the effects of TED from both the source and the drain begin to overlap. These overlapping TED effects cause a change in the threshold voltage in the device that is gate-length dependent. Consequently, variations in gate length from device to device result in variations of threshold voltage and other electrical parameters from device to device. Since the design rules for FET devices are getting progressively smaller, i.e., 0.5 .mu.m to 0.35 .mu.m to 0.25 .mu.m to 0.18 .mu.m, the need to suppress the effects of TED is increasing.
Recent investigations have been aimed at untangling the mechanisms of dopant diffusion in order to provide a sound basis for simulation programs designed to predict dopant diffusion during device processing. An additional challenge is the development of processing-compatible methods of controlling the diffusion of dopant atoms.
Recently, S. Nishikawa, A. Tanaka and T. Yamaji, Appl. Phys. Lett. 60, 2270 (1992), reported that dopant diffusion can be reduced when carbon (C) is co-implanted with boron into a silicon substrate. This reduction has been attributed to the fact that the implanted carbon provides a sink for excess interstitials during annealing. However, the presence of carbon in certain regions of the substrate has been observed to cause current to leak into the substrate. Accordingly, if carbon is to be useful as a solution to the diffusion of dopants into the substrate from the source and the drain, the current leakage caused by the presence of carbon in the substrate must be reduced.